#include <cafe/os.h> void LCStoreDMABlocks(void* memDestAddr, const void* lcSrcAddr, u32 numBlocks);
|memDestAddr||Memory destination address.|
|lcSrcAddr||Locked cache source address.|
|numBlocks||Transfer size (number of cache blocks). A cache block is 32B. Must be specified as a value between
Enqueues a single DMA transaction to transfer data to memory at memDestAddr from the locked cache at lcSrcAddr. This function has a maximum transaction limit of 128 cache blocks (4 KB) and performs no error checking. Implementation is currently a blocking call that returns when the DMA is completed.
DMAs are not cache-coherent. Addresses should be 64-byte aligned (
LL_CACHE_FETCH_SIZE) to ensure coherency with L2 64-byte fetching. Likewise, the DMA size should be a multiple of 64
LL_CACHE_FETCH_SIZE). numBlocks takes
a value from
127 and should be a multiple of 2 (64 bytes). A value of
0 for numBlocks indicates a transaction size of 128 blocks.
A call to
LCEnableDMA must be made prior to the first DMA request on the core.
The only methods to determine whether the transaction has completed is to poll the length of the DMA queue with the
LCGetDMAQueueLength function or to wait until the queue length reaches a fixed value with the
The hardware allows a maximum of 15 DMA transactions that can be issued per core in the DMA queue. If the queue overflows, a machine check exception occurs. Because the current implementation is a blocking call, there is a maximum of one DMA per core outstanding.
If DMA detects a source address in the normal cache, a machine check exception occurs.
|Background, Cores 0 & 1||In applications, do not call this function from Core 0 or 1 when in the background.|
2013/05/08 Automated cleanup pass.
LCGetAllocatableSize. Removed LCLoadDMAASync and LCStoreDMAASync.
2011/06/14 Initial version.